Frequency dividers are commonly used in frequency synthesizers. For example, frequency synthesizers are used to generate tuning frequencies for wireless transmitters and receivers. A typical frequency divider receives an input signal at one frequency and produces an output signal at a lower frequency.
Frequency dividers are often based on the use of flip-flops to count periods of an input signal. Generally, the circuitry associated with the least significant bits (LSBs) has a higher transition frequency and the circuitry associated with the most significant bits (MSBs) has a lower transition frequency. Despite the lower transition frequency, the MSB circuitry may still require fast transition times and therefore may not be able to be implemented with lower speed components.
If the input signal to a frequency divider based on flip-flop circuitry is high frequency (e.g., greater than 2 GHz), the flip-flops are implemented in high speed circuitry such as current-mode logic (CML) (or source-coupled logic (SCL)) circuitry. Although high speed, CML circuits are not power efficient because the circuits require a static bias current that constantly consumes power.